The present disclosure relates to a semiconductor structure and a method of forming the same. More particularly, the present disclosure relates to a semiconductor structure including an anti-fuse structure located within an interconnect dielectric material and a method of forming the same.
Anti-fuse structures have been used in the semiconductor industry for memory related applications such as, for example, field programmable gate arrays and programmable read-only memories. Most existing anti-fuse structures have a layer of anti-fuse material sandwiched in between two disconnected conductive materials. In such structures, the anti-fuse structure/circuit initially has a very high resistance, but after programming by electrical or optical means, the high resistance structure/circuit is converted to a lower resistance state.
Prior art processes for integrating anti-fuse structures within an interconnect structure require many extra masking and etching steps which increase the overall cost of fabricating an integrated circuit. Therefore, a cost effective means for integrating an anti-fuse structure within an interconnect structure is needed which does not require any extra masking and etching steps.